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2020 commits behind, 47 commits ahead of the upstream repository.
-
chrissi^ authoredThe Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip. Its 32, 128 and 256 Mbits siblings are supported upstream but this particular size wasn't. This commit includes patches for kernels 4.14 and 4.19. Tested on a COMFAST CF-E120A v3 (ath79). Signed-off-by:
Roger Pueyo Centelles <roger.pueyo@guifi.net>
---
This patch was taken from upstream OpenWRT commit-id
359f5e539036db4f7ac69a6d1c3fb7fe70266ffd.
Additionally change needed for CPE210 V3.2 was backporte from 4.14 to
4.9.
This allows us to use The CPE 210 V3.2 with Gluon 2019.x.chrissi^ authoredThe Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip. Its 32, 128 and 256 Mbits siblings are supported upstream but this particular size wasn't. This commit includes patches for kernels 4.14 and 4.19. Tested on a COMFAST CF-E120A v3 (ath79). Signed-off-by:Roger Pueyo Centelles <roger.pueyo@guifi.net>
---
This patch was taken from upstream OpenWRT commit-id
359f5e539036db4f7ac69a6d1c3fb7fe70266ffd.
Additionally change needed for CPE210 V3.2 was backporte from 4.14 to
4.9.
This allows us to use The CPE 210 V3.2 with Gluon 2019.x.
0029-Backport-en25qh64-from-4.14-to-4.9.patch 1.27 KiB
From: Chris Fiege <chris@tinyhost.de>
Date: Wed, 14 Oct 2020 21:47:56 +0200
Subject: HACK: Backport en25qh64 from 4.14 to 4.9
diff --git a/target/linux/generic/pending-4.9/476-mtd-spi-nor-add-eon-en25q128.patch b/target/linux/generic/pending-4.9/476-mtd-spi-nor-add-eon-en25q128.patch
index ac1fda51593af87fe9bd5a5a3bb433e1f098a740..9a9371165369442143a04e74c100db4d589b99d0 100644
--- a/target/linux/generic/pending-4.9/476-mtd-spi-nor-add-eon-en25q128.patch
+++ b/target/linux/generic/pending-4.9/476-mtd-spi-nor-add-eon-en25q128.patch
@@ -8,11 +8,12 @@ Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -954,6 +954,7 @@ static const struct flash_info spi_nor_i
+@@ -954,6 +954,8 @@ static const struct flash_info spi_nor_i
{ "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64, 0) },
{ "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) },
{ "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) },
+ { "en25q128", INFO(0x1c3018, 0, 64 * 1024, 256, SECT_4K) },
++ { "en25qh64", INFO(0x1c7017, 0, 64 * 1024, 128, 0) },
{ "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256, 0) },
{ "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) },
{ "en25s64", INFO(0x1c3817, 0, 64 * 1024, 128, SECT_4K) },